skip to main content
OSTI.GOV title logo U.S. Department of Energy
Office of Scientific and Technical Information

Title: Arithmetic functions in torus and tree networks

Patent ·
OSTI ID:921478

Methods and systems for performing arithmetic functions. In accordance with a first aspect of the invention, methods and apparatus are provided, working in conjunction of software algorithms and hardware implementation of class network routing, to achieve a very significant reduction in the time required for global arithmetic operation on the torus. Therefore, it leads to greater scalability of applications running on large parallel machines. The invention involves three steps in improving the efficiency and accuracy of global operations: (1) Ensuring, when necessary, that all the nodes do the global operation on the data in the same order and so obtain a unique answer, independent of roundoff error; (2) Using the topology of the torus to minimize the number of hops and the bidirectional capabilities of the network to reduce the number of time steps in the data transfer operation to an absolute minimum; and (3) Using class function routing to reduce latency in the data transfer. With the method of this invention, every single element is injected into the network only once and it will be stored and forwarded without any further software overhead. In accordance with a second aspect of the invention, methods and systems are provided to efficiently implement global arithmetic operations on a network that supports the global combining operations. The latency of doing such global operations are greatly reduced by using these methods.

Research Organization:
Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
W-7405-ENG-48
Assignee:
International Business Machines Corporation (Armonk, NY)
Patent Number(s):
7,313,582
Application Number:
10/468,991
OSTI ID:
921478
Country of Publication:
United States
Language:
English

References (13)

A communication model based on an n-dimensional torus architecture using deadlock-free wormhole routing
  • Holzenspies, P.; Schepers, E.; Bach, W.
  • Proceedings. Euromicro Symposium on Digital System Design, Euromicro Symposium on Digital System Design, 2003. Proceedings. https://doi.org/10.1109/DSD.2003.1231920
conference January 2003
Network decontamination with local immunization conference January 2006
Parallel image analysis on recursive Torus architecture conference January 1993
The P-Mesh-a commodity-based scalable network architecture for clusters
  • Nitzberg, B.; Kuszmaul, C.; Stockdale, I.
  • HICSS 32 - 32nd Annual Hawaii International Conference on System Sciences, Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences. 1999. HICSS-32. Abstracts and CD-ROM of Full Papers https://doi.org/10.1109/HICSS.1999.773070
conference January 1999
Exploiting multiple degrees of BP parallelism on the highly parallel computer AP1000 conference January 1995
Polymorphic-torus architecture for computer vision journal March 1989
A Scalable Distributed Parallel Breadth-First Search Algorithm on BlueGene/L conference January 2005
Data level parallel processing for object recognition on Recursive Torus Architecture conference January 1995
A unified formulation of honeycomb and diamond networks journal January 2001
A peer-to-peer network based on multi-mesh architecture conference January 2003
Scalable distributed architecture of the terabit router conference January 2004
Image analysis and computer vision: 1988 journal May 1989
Efficient mapping algorithm of multilayer neural network on torus architecture journal September 2003