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Title: Field-effect transistor having a superlattice channel and high carrier velocities at high applied fields

Patent ·
OSTI ID:866815

A field effect transistor comprises a semiconductor having a source, a drain, a channel and a gate in operational relationship. The semiconductor is a strained layer superlattice comprising alternating quantum well and barrier layers, the quantum well layers and barrier layers being selected from the group of layer pairs consisting of InGaAs/AlGaAs, InAs/InAlGaAs, and InAs/InAlAsP. The layer thicknesses of the quantum well and barrier layers are sufficiently thin that the alternating layers constitute a superlattice which has a superlattice conduction band energy level structure in k-vector space which includes a lowest energy .GAMMA.-valley and a next lowest energy L-valley, each k-vector corresponding to one of the orthogonal directions defined by the planes of said layers and the directions perpendicular thereto. The layer thicknesses of the quantum well layers are selected to provide a superlattice L.sub.2D -valley which has a shape which is substantially more two-dimensional than that of said bulk L-valley.

Research Organization:
AT&T
DOE Contract Number:
AC04-76DP00789
Assignee:
United States of America as represented by United States (Washington, DC)
Patent Number(s):
US 4797716
OSTI ID:
866815
Country of Publication:
United States
Language:
English