A new technique for imaging the logic state of passivated conductors: Biased resistive contrast imaging

Conference · Mon Jan 01 00:00:00 EST 1990

OSTI ID:5042262

Cole, Jr, E I

A new scanning electron microscopy imaging technique has been developed to examine the logic state of conductors on passivated CMOS integrated circuits. This technique employs a modified Resistive Contrast Imaging system to acquire image data on powered devices. The image is generated by monitoring subtle shifts in the power supply current of an integrated circuit as an electron beam is scanned over the device surface. The images produced with this new technique resemble voltage contrast data from devices with the passivation removed and the surface topography subtracted. Non-destructive applications of this imaging method to functional and failed integrated circuits are described. Possible irradiation effects and methods to minimize them are also discussed. 2 refs., 1 fig.

• Research Organization: Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
• Sponsoring Organization: DOE/DP
• DOE Contract Number: AC04-76DP00789
• OSTI ID: 5042262
• Report Number(s): SAND-89-2384C; CONF-900304-1; ON: DE90000666
• Resource Relation: Conference: International reliability physics symposium, New Orleans, LA (USA), 26-29 Mar 1990
• Country of Publication: United States
• Language: English

Related Subjects

42 ENGINEERING
47 OTHER INSTRUMENTATION
INTEGRATED CIRCUITS
NONDESTRUCTIVE TESTING
IMAGE PROCESSING
IMAGES
RESOLUTION
SCANNING ELECTRON MICROSCOPY
ELECTRON MICROSCOPY
ELECTRONIC CIRCUITS
MATERIALS TESTING
MICROELECTRONIC CIRCUITS
MICROSCOPY
PROCESSING
TESTING
426000* - Engineering- Components
Electron Devices & Circuits- (1990-)
440800 - Miscellaneous Instrumentation- (1990-)