Data compression system using base values and methods thereof

Patent · Tue Aug 29 00:00:00 EDT 2023

OSTI ID:2222235

Seyedzadehdelcheh, Seyed Mohammad; Zhang, Xianwei; Beckmann, Bradford; Das, Shomit N.

In some embodiments, a memory controller in a processor includes a base value cache, a compressor, and a metadata cache. The compressor is coupled to the base value cache and the metadata cache. The compressor compresses a data block using at least a base value and delta values. The compressor determines whether the size of the data block exceeds a data block threshold value. Based on the determination of whether the size of the compressed data block generated by the compressor exceeds the data block threshold value, the memory controller transfers only a set of the compressed delta values to memory for storage. A decompressor located in the lower level cache of the processor decompresses the compressed data block using the base value stored in the base value cache, metadata stored in the metadata cache and the delta values stored in memory.

• Research Organization: Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States); Advanced Micro Devices, Inc., Santa Clara, CA (United States)
• Sponsoring Organization: USDOE
• DOE Contract Number: AC52-07NA27344; B620717
• Assignee: Advanced Micro Devices, Inc. (Santa Clara, CA)
• Patent Number(s): 11,740,791
• Application Number: 17/497,286
• OSTI ID: 2222235
• Resource Relation: Patent File Date: 10/08/2021
• Country of Publication: United States
• Language: English