Per-instruction energy debugging using instruction sampling hardware

Wei, Shijia; Greathouse, Joseph L.; Kalamatianos, John

Title: Per-instruction energy debugging using instruction sampling hardware

Patent · Tue Jan 17 00:00:00 EST 2023

OSTI ID:1987051

Wei, Shijia; Greathouse, Joseph L.; Kalamatianos, John

A processor utilizes instruction based sampling to generate sampling data sampled on a per instruction basis during execution of an instruction. The sampling data indicates what processor hardware was used due to the execution of the instruction. Software receives the sampling data and generates an estimate of energy used by the instruction based on the sampling data. The sampling data may include microarchitectural events and the energy estimate utilizes a base energy amount corresponding to the instruction executed along with energy amounts corresponding to the microarchitectural events in the sampling data. The sampling data may include switching events associated with hardware blocks that switched due to execution of the instruction and the energy estimate for the instruction is based on the switching events and capacitance estimates associated with the hardware blocks.

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Research Organization:: Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States); Advanced Micro Devices, Inc., Santa Clara, CA (United States)

Sponsoring Organization:: USDOE

DOE Contract Number:: AC52-07NA27344; B620717

Assignee:: Advanced Micro Devices, Inc. (Santa Clara, CA)

Patent Number(s):: 11,556,162

Application Number:: 15/923,153

OSTI ID:: 1987051

Resource Relation:: Patent File Date: 03/16/2018

Country of Publication:: United States

Language:: English

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