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Title: Power inverter module with reduced inductance

Patent ·
OSTI ID:1805589

A power inverter module includes a base module having a plurality of electrically conductive layers, including a first conductive layer, a second conductive layer and a third conductive layer. A first terminal is operatively connected to the first conductive layer at a first end and a second terminal is operatively connected to the second conductive layer at the first end. An isolation sheet is sandwiched between the first and second terminals. The first terminal and the second terminal include a respective proximal portion composed of a first material and a respective distal portion composed of a second material. At least one of the first terminal and the second terminal is bent to create an overlap zone such that a gap between the first terminal and the second terminal in the overlap zone is less than a threshold distance. The power inverter module is configured to reduce parasitic inductance.

Research Organization:
GM Global Technology Operations LLC, Detroit, MI (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
EE0007285
Assignee:
GM Global Technology Operations LLC (Detroit, MI)
Patent Number(s):
10,937,747
Application Number:
16/516,607
OSTI ID:
1805589
Resource Relation:
Patent File Date: 07/19/2019
Country of Publication:
United States
Language:
English

References (7)

Semiconductor device patent-application March 2016
Substrate subassembly and method of making transistor switch module patent February 1996
Power module assembly with reduced inductance patent March 2018
Power module assembly with dual substrates and reduced inductance patent May 2019
Semiconductor Subassemblies with Interconnects and Methods for Manufacturing the Same patent-application December 2008
Semiconductor Device Including Diffusion Soldered Layer on Sintered Silver Layer patent-application February 2013
Semiconductor Modules and Methods of Forming the Same patent-application June 2013