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Title: Method and apparatus for temperature-gradient aware data-placement for 3D stacked DRAMs

Patent ·
OSTI ID:1735083
; ;

A system including a stack of two or more layers of volatile memory, such as layers of a 3D stacked DRAM memory, places data in the stack based on a temperature or a refresh rate. When a threshold is exceeded, data are moved from a first region to a second region in the stack, the second region having one or both of a second temperature lower than a first temperature of the first region or a second refresh rate lower than a first refresh rate of the first region.

Research Organization:
Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
AC52-07NA27344
Assignee:
Advanced Micro Devices, Inc. (Santa Clara, CA)
Patent Number(s):
10,725,670
Application Number:
16/052,055
OSTI ID:
1735083
Resource Relation:
Patent File Date: 08/01/2018
Country of Publication:
United States
Language:
English

References (6)

AVATAR: A Variable-Retention-Time (VRT) Aware Refresh for DRAM Systems
  • Qureshi, Moinuddin K.; Kim, Dae-Hyun; Khan, Samira
  • 2015 45th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN) https://doi.org/10.1109/DSN.2015.58
conference June 2015
Temperature Based DRAM Refresh patent-application June 2006
Dynamic Operations for 3D Stacked Memory Using Thermal Data patent-application October 2013
Updating Read Voltages patent-application September 2017
Systems and Methods for Choosing a Memory Block for the Storage of Data Based on a Frequency with Which the Data Is Updated patent-application June 2016
Systems and Methods to Refresh DRAM Based on Temperature and Based on Calibration Data patent-application October 2016

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Related Subjects

97 MATHEMATICS AND COMPUTING