Parasitic Capacitors' Impact on Switching Performance in a 10 kV SiC MOSFET Based Converter

Conference · Mon Oct 01 00:00:00 EDT 2018

DOI:https://doi.org/10.1109/WiPDA.2018.8569080· OSTI ID:1559727

Huang, Xingxuan ^[1]; Ji, Shiqi ^[2]; Palmer, James ^[2]; Zhang, Li ^[2]; Tolbert, Leon  ^[3]; Wang, Fei ^[3]

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1. University of Tennessee, Knoxville (UTK)
2. The University of Tennessee, Knoxville
3. ORNL

In a converter based on 10 kV SiC MOSFETs, major sources of parasitic capacitance are the anti-parallel junction barrier schottky (JBS) diode, heat sink, and load inductor. A half bridge phase leg test setup is built to investigate these parasitic capacitors’ impact on the switching performance at 6.25 kV. Generally these parasitic capacitors slows down both turn-on and turn-off transient and can cause significant increase in switching energy loss. The impact of the parasitic capacitor in the load inductor is analyzed, which has either very short wire or long wire in series. Switching performance of the phase leg with two different thermal designs are compared to investigate the impact of the parasitic capacitor due to the heat sink. The large parasitic capacitor due to the large drain plate of discrete 10 kV SiC MOSFET for heat dissipation can result in 44.5% increase in switching energy loss at low load current.

• Research Organization: Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States)
• Sponsoring Organization: USDOE
• DOE Contract Number: AC05-00OR22725
• OSTI ID: 1559727
• Resource Relation: Conference: IEEE Workshop on Wide Bandgap Devices and Applications - Atlanta, Georgia, United States of America - 10/31/2018 4:00:00 AM-11/2/2018 4:00:00 AM
• Country of Publication: United States
• Language: English