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Title: Study of SiO{sub 2}/4H-SiC interface nitridation by post-oxidation annealing in pure nitrogen gas

Journal Article · · AIP Advances
DOI:https://doi.org/10.1063/1.4930980· OSTI ID:22492351
; ; ;  [1]
  1. Graduate School of Engineering, Osaka University, 2-1 Yamadaoka, Suita, Osaka 565-0871 (Japan)

An alternative and effective method to perform interface nitridation for 4H-SiC metal-oxide-semiconductor (MOS) devices was developed. We found that the high-temperature post-oxidation annealing (POA) in N{sub 2} ambient was beneficial to incorporate a sufficient amount of nitrogen atoms directly into thermal SiO{sub 2}/SiC interfaces. Although N{sub 2}-POA was ineffective for samples with thick thermal oxide layers, interface nitridation using N{sub 2}-POA was achieved under certain conditions, i.e., thin SiO{sub 2} layers (< 15 nm) and high annealing temperatures (>1350°C). Electrical characterizations of SiC-MOS capacitors treated with high-temperature N{sub 2}-POA revealed the same evidence of slow trap passivation and fast trap generation that occurred in NO-treated devices fabricated with the optimized nitridation conditions.

OSTI ID:
22492351
Journal Information:
AIP Advances, Vol. 5, Issue 9; Other Information: (c) 2015 Author(s); Country of input: International Atomic Energy Agency (IAEA); ISSN 2158-3226
Country of Publication:
United States
Language:
English