Apparatus and methods for managing packet transfer across a memory fabric physical layer interface
Abstract
An apparatus and method for managing packet transfer between a memory fabric having a physical layer interface higher data rate than a data rate of a physical layer interface of another device, receives incoming packets from the memory fabric physical layer interface wherein at least some of the packets include different instruction types. The apparatus and method determine a packet type of the incoming packet received from the memory fabric physical layer interface and when the determined incoming packet type is of a type containing an atomic request, the method and apparatus prioritizes transfer of the incoming packet with the atomic request over other packet types of incoming packets, to memory access logic that accesses local memory within an apparatus.
- Inventors:
- Issue Date:
- Research Org.:
- Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States); Advanced Micro Devices, Inc., Santa Clara, CA (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 2222083
- Patent Number(s):
- 11720279
- Application Number:
- 16/701,794
- Assignee:
- Advanced Micro Devices, Inc. (Santa Clara, CA)
- DOE Contract Number:
- AC52-07NA27344; B620717
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 12/03/2019
- Country of Publication:
- United States
- Language:
- English
Citation Formats
Blagodurov, Sergey. Apparatus and methods for managing packet transfer across a memory fabric physical layer interface. United States: N. p., 2023.
Web.
Blagodurov, Sergey. Apparatus and methods for managing packet transfer across a memory fabric physical layer interface. United States.
Blagodurov, Sergey. Tue .
"Apparatus and methods for managing packet transfer across a memory fabric physical layer interface". United States. https://www.osti.gov/servlets/purl/2222083.
@article{osti_2222083,
title = {Apparatus and methods for managing packet transfer across a memory fabric physical layer interface},
author = {Blagodurov, Sergey},
abstractNote = {An apparatus and method for managing packet transfer between a memory fabric having a physical layer interface higher data rate than a data rate of a physical layer interface of another device, receives incoming packets from the memory fabric physical layer interface wherein at least some of the packets include different instruction types. The apparatus and method determine a packet type of the incoming packet received from the memory fabric physical layer interface and when the determined incoming packet type is of a type containing an atomic request, the method and apparatus prioritizes transfer of the incoming packet with the atomic request over other packet types of incoming packets, to memory access logic that accesses local memory within an apparatus.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Aug 08 00:00:00 EDT 2023},
month = {Tue Aug 08 00:00:00 EDT 2023}
}
Works referenced in this record:
Attribute based memory pre-fetching technique
patent, April 2004
- Marshall, John
- US Patent Document 6,728,839
Data storage system having acceleration path for congested packet switching network
patent, July 2011
- Tran, Nhut Quan; Sgrosso, Michael; Guyer, James
- US Patent Document 7,979,588
Uniform memory access architecture
patent, July 2019
- Davis, Mark Bradley; Volpe, Thomas A.; Bshara, Nafea
- US Patent Document 10,346,342
Mutual Exclusion in a Non-Coherent Memory Hierarchy
patent-application, October 2017
- Fernando, John
- US Patent Application 15/085977; 20170286329