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Title: Method and apparatus for managing access to a memory

Abstract

A method and apparatus for managing access to a memory of a computing system. A controller transforms a plurality of operations that represent a computing job into an operational memory layout that reduces a size of a selected portion of the memory that needs to be accessed to perform the computing job. The controller stores the operational memory layout in a plurality of memory cells within the selected portion of the memory. The controller controls a sequence by which a processor in the computing system accesses the memory to perform the computing job using the operational memory layout. The operational memory layout reduces an amount of energy consumed by the processor to perform the computing job.

Inventors:
Issue Date:
Research Org.:
Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1373721
Patent Number(s):
9720851
Application Number:
14/831,702
Assignee:
National Technologies & Engineering Solutions of Sandia, LLC
Patent Classifications (CPCs):
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
Y - NEW / CROSS SECTIONAL TECHNOLOGIES Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE Y02D - CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWN ENERGY USE
DOE Contract Number:  
AC04-94AL85000
Resource Type:
Patent
Resource Relation:
Patent File Date: 2015 Aug 20
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

DeBenedictis, Erik. Method and apparatus for managing access to a memory. United States: N. p., 2017. Web.
DeBenedictis, Erik. Method and apparatus for managing access to a memory. United States.
DeBenedictis, Erik. Tue . "Method and apparatus for managing access to a memory". United States. https://www.osti.gov/servlets/purl/1373721.
@article{osti_1373721,
title = {Method and apparatus for managing access to a memory},
author = {DeBenedictis, Erik},
abstractNote = {A method and apparatus for managing access to a memory of a computing system. A controller transforms a plurality of operations that represent a computing job into an operational memory layout that reduces a size of a selected portion of the memory that needs to be accessed to perform the computing job. The controller stores the operational memory layout in a plurality of memory cells within the selected portion of the memory. The controller controls a sequence by which a processor in the computing system accesses the memory to perform the computing job using the operational memory layout. The operational memory layout reduces an amount of energy consumed by the processor to perform the computing job.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2017},
month = {8}
}

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Works referenced in this record:

Improvement of Electronic-Computer Reliability through the Use of Redundancy
journal, September 1961


Design of a Repairable Redundant Computer
journal, October 1962


Self-checked computation using residue arithmetic
journal, January 1966


In Quest of the “Next Switch”: Prospects for Greatly Reduced Power Dissipation in a Successor to the Silicon Field-Effect Transistor
journal, December 2010


1.1 TMACS/mW Fine-Grained Stochastic Resonant Charge-Recycling Array Processor
journal, April 2012


Energy-Efficient Digital Signal Processing via Voltage-Overscaling-Based Residue Number System
journal, July 2013


A low-power sense amplifier for adiabatic memory using memristor
conference, December 2012