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Title: Silicon on insulator with active buried regions

Abstract

A method is disclosed for forming patterned buried components, such as collectors, sources and drains, in silicon-on-insulator (SOI) devices. The method is carried out by epitaxially growing a suitable sequence of single or multiple etch stop layers ending with a thin silicon layer on a silicon substrate, masking the silicon such that the desired pattern is exposed, introducing dopant and activating in the thin silicon layer to form doped regions. Then, bonding the silicon layer to an insulator substrate, and removing the silicon substrate. The method additionally involves forming electrical contact regions in the thin silicon layer for the buried collectors. 10 figs.

Inventors:
Issue Date:
Research Org.:
Univ. of California (United States)
OSTI Identifier:
187078
Patent Number(s):
5488012
Application Number:
PAN: 8-137,412
Assignee:
Univ. of California, Oakland, CA (United States)
DOE Contract Number:  
W-7405-ENG-48
Resource Type:
Patent
Resource Relation:
Other Information: PBD: 30 Jan 1996
Country of Publication:
United States
Language:
English
Subject:
42 ENGINEERING NOT INCLUDED IN OTHER CATEGORIES; SEMICONDUCTOR DEVICES; FABRICATION; ELECTRICAL INSULATORS; DOPED MATERIALS; CHARGE COLLECTION; ETCHING

Citation Formats

McCarthy, A M. Silicon on insulator with active buried regions. United States: N. p., 1996. Web.
McCarthy, A M. Silicon on insulator with active buried regions. United States.
McCarthy, A M. Tue . "Silicon on insulator with active buried regions". United States.
@article{osti_187078,
title = {Silicon on insulator with active buried regions},
author = {McCarthy, A M},
abstractNote = {A method is disclosed for forming patterned buried components, such as collectors, sources and drains, in silicon-on-insulator (SOI) devices. The method is carried out by epitaxially growing a suitable sequence of single or multiple etch stop layers ending with a thin silicon layer on a silicon substrate, masking the silicon such that the desired pattern is exposed, introducing dopant and activating in the thin silicon layer to form doped regions. Then, bonding the silicon layer to an insulator substrate, and removing the silicon substrate. The method additionally involves forming electrical contact regions in the thin silicon layer for the buried collectors. 10 figs.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Jan 30 00:00:00 EST 1996},
month = {Tue Jan 30 00:00:00 EST 1996}
}

Patent:
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