Silicon on insulator with active buried regions
Abstract
A method is disclosed for forming patterned buried components, such as collectors, sources and drains, in silicon-on-insulator (SOI) devices. The method is carried out by epitaxially growing a suitable sequence of single or multiple etch stop layers ending with a thin silicon layer on a silicon substrate, masking the silicon such that the desired pattern is exposed, introducing dopant and activating in the thin silicon layer to form doped regions. Then, bonding the silicon layer to an insulator substrate, and removing the silicon substrate. The method additionally involves forming electrical contact regions in the thin silicon layer for the buried collectors. 10 figs.
- Inventors:
- Issue Date:
- Research Org.:
- Univ. of California (United States)
- Sponsoring Org.:
- USDOE, Washington, DC (United States)
- OSTI Identifier:
- 672617
- Patent Number(s):
- 5760443
- Application Number:
- PAN: 8-547,080
- Assignee:
- Univ. of California, Oakland, CA (United States)
- DOE Contract Number:
- W-7405-ENG-48
- Resource Type:
- Patent
- Resource Relation:
- Other Information: PBD: 2 Jun 1998
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 42 ENGINEERING NOT INCLUDED IN OTHER CATEGORIES; SEMICONDUCTOR DEVICES; FABRICATION; EPITAXY; SILICON; MASKING; CRYSTAL DOPING; ELECTRICAL INSULATORS; SUBSTRATES; ELECTRIC CONTACTS
Citation Formats
McCarthy, A M. Silicon on insulator with active buried regions. United States: N. p., 1998.
Web.
McCarthy, A M. Silicon on insulator with active buried regions. United States.
McCarthy, A M. Tue .
"Silicon on insulator with active buried regions". United States.
@article{osti_672617,
title = {Silicon on insulator with active buried regions},
author = {McCarthy, A M},
abstractNote = {A method is disclosed for forming patterned buried components, such as collectors, sources and drains, in silicon-on-insulator (SOI) devices. The method is carried out by epitaxially growing a suitable sequence of single or multiple etch stop layers ending with a thin silicon layer on a silicon substrate, masking the silicon such that the desired pattern is exposed, introducing dopant and activating in the thin silicon layer to form doped regions. Then, bonding the silicon layer to an insulator substrate, and removing the silicon substrate. The method additionally involves forming electrical contact regions in the thin silicon layer for the buried collectors. 10 figs.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Jun 02 00:00:00 EDT 1998},
month = {Tue Jun 02 00:00:00 EDT 1998}
}
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