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Code Generators for Floating-Point Unit Design in Integrated Circuits (OpenFloat) v1.0

Software ·
DOI:https://doi.org/10.11578/dc.20251009.3· OSTI ID:code-166589 · Code ID:166589
 [1];  [1];  [1];  [2]
  1. Lawrence Berkeley National Laboratory (LBNL), Berkeley, CA (United States)
  2. Lawrence Berkeley National Laboratory (LBNL), Berkeley, CA (United States); University of Houston - Clear Lake
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This IP provides a comprehensive set of code generators for various floating-point units (FPUs) essential for integrated circuit design and integration, targeting a broad spectrum of applications, including machine learning and scientific computing. The suite includes FP adders, multipliers, subtractors, dividers, reciprocals, exponentials, square roots, trigonometric functions (sine, cosine, arctangent), and more. It supports customizable hardware design parameters, such as precision (16, 32, 64, and 128 bits) and pipeline depths, offering users enhanced flexibility and productivity. The generated code is in an industry-standard hardware description language, ensuring compatibility with standard design flows, including simulation, verification, synthesis, and implementation on both field-programmable gate arrays (FPGAs) and application-specific integrated circuits (ASICs).
Short Name / Acronym:
OpenFloat v1.0
Site Accession Number:
2025-018
Software Type:
Scientific
License(s):
BSD 3-clause "New" or "Revised" License
Research Organization:
Lawrence Berkeley National Laboratory (LBNL), Berkeley, CA (United States); University of Houston - Clear Lake
Sponsoring Organization:
USDOE
Primary Award/Contract Number:
AC02-05CH11231
DOE Contract Number:
AC02-05CH11231
Code ID:
166589
OSTI ID:
code-166589
Country of Origin:
United States

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