Development of a CMOS SOI Pixel Detector

Conference · Tue Aug 19 00:00:00 EDT 2008

OSTI ID:937201

Arai, Y; Hazumi, M; Ikegami, Y; Kohriki, T; Tajima, O; Terada, S; Tsuboyama, T; Unno, Y; Ushiroda, Y; Ikeda, H; Hara, K; Ishino, H; Kawasaki, T; Miyake, H; Martin, E; Varner, G; Tajima, H; Ohno, M; Fukuda, K; Komatsubara, H ; Ida, J

We have developed a monolithic radiation pixel detector using silicon on insulator (SOI) with a commercial 0.15 {micro}m fully-depleted-SOI technology and a Czochralski high resistivity silicon substrate in place of a handle wafer. The SOI TEG (Test Element Group) chips with a size of 2.5 x 2.5 mm{sup 2} consisting of 20 x 20 {micro}m{sup 2} pixels have been designed and manufactured. Performance tests with a laser light illumination and a {beta} ray radioactive source indicate successful operation of the detector. We also briefly discuss the back gate effect as well as the simulation study.

• Research Organization: SLAC National Accelerator Lab., Menlo Park, CA (United States)
• Sponsoring Organization: USDOE
• DOE Contract Number: AC02-76SF00515
• OSTI ID: 937201
• Report Number(s): SLAC-PUB-13374; TRN: US0805995
• Resource Relation: Conference: Prepared for 12th Workshop on Electronics for LHC and Future Experiments (LECC 2006), Valencia, Spain, 25-29 Sep 2006
• Country of Publication: United States
• Language: English

Related Subjects

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY
RADIATION DETECTORS
DESIGN
SILICON
PERFORMANCE
SUBSTRATES
BETA DETECTION
Instrumentation