Radiation-hardened transistor and integrated circuit

Patent · Mon Nov 19 23:00:00 EST 2007

OSTI ID:919904

Ma, Kwok K ^[1]

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1. Albuquerque, NM

A composite transistor is disclosed for use in radiation hardening a CMOS IC formed on an SOI or bulk semiconductor substrate. The composite transistor has a circuit transistor and a blocking transistor connected in series with a common gate connection. A body terminal of the blocking transistor is connected only to a source terminal thereof, and to no other connection point. The blocking transistor acts to prevent a single-event transient (SET) occurring in the circuit transistor from being coupled outside the composite transistor. Similarly, when a SET occurs in the blocking transistor, the circuit transistor prevents the SET from being coupled outside the composite transistor. N-type and P-type composite transistors can be used for each and every transistor in the CMOS IC to radiation harden the IC, and can be used to form inverters and transmission gates which are the building blocks of CMOS ICs.

• Research Organization: Sandia National Laboratories (SNL-NM), Albuquerque, NM
• Sponsoring Organization: United States Department of Energy
• DOE Contract Number: AC04-94AL85000
• Assignee: Sandia Corporation (Albuquerque, NM)
• Patent Number(s): 7,298,010
• Application Number: 11/358,391
• OSTI ID: 919904
• Country of Publication: United States
• Language: English