Electroless epitaxial etching for semiconductor applications
Patent
·
OSTI ID:874236
- Menlo Park, CA
A method for fabricating thin-film single-crystal silicon on insulator substrates using electroless etching for achieving efficient etch stopping on epitaxial silicon substrates. Microelectric circuits and devices are prepared on epitaxial silicon wafers in a standard fabrication facility. The wafers are bonded to a holding substrate. The silicon bulk is removed using electroless etching leaving the circuit contained within the epitaxial layer remaining on the holding substrate. A photolithographic operation is then performed to define streets and wire bond pad areas for electrical access to the circuit.
- Research Organization:
- Lawrence Livermore National Laboratory (LLNL), Livermore, CA
- DOE Contract Number:
- W-7405-ENG-48
- Assignee:
- The Regents of the University of California (Oakland, CA)
- Patent Number(s):
- US 6346461
- OSTI ID:
- 874236
- Country of Publication:
- United States
- Language:
- English
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