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Transistors using crystalline silicon devices on glass

Patent ·
OSTI ID:869879
 [1]
  1. Menlo Park, CA
+ Show Author Affiliations

A method for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed.

Research Organization:
Lawrence Livermore National Laboratory (LLNL), Livermore, CA
DOE Contract Number:
W-7405-ENG-48
Assignee:
Regents of University of California ()
Patent Number(s):
US 5414276
OSTI ID:
869879
Country of Publication:
United States
Language:
English

References (5)

Low-temperature fabrication of p/sup +/-n diodes with 300-AA junction depth journal July 1992
Laser crystallization of Si films on glass journal March 1982
Nanosecond Thermal Processing for Ultra-High-Speed Device Technology journal January 1989
A technology for high-performance single-crystal silicon-on-insulator transistors journal April 1987
Silicon-on-insulator (SOI) by bonding and ETCH-back conference January 1985

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