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Three dimensional, multi-chip module

Patent ·
OSTI ID:868907
 [1];  [2]
  1. Berkeley, CA
  2. Pleasanton, CA
+ Show Author Affiliations

A plurality of multi-chip modules are stacked and bonded around the perimeter by sold-bump bonds to adjacent modules on, for instance, three sides of the perimeter. The fourth side can be used for coolant distribution, for more interconnect structures, or other features, depending on particular design considerations of the chip set. The multi-chip modules comprise a circuit board, having a planarized interconnect structure formed on a first major surface, and integrated circuit chips bonded to the planarized interconnect surface. Around the periphery of each circuit board, long, narrow "dummy chips" are bonded to the finished circuit board to form a perimeter wall. The wall is higher than any of the chips on the circuit board, so that the flat back surface of the board above will only touch the perimeter wall. Module-to-module interconnect is laser-patterned o the sides of the boards and over the perimeter wall in the same way and at the same time that chip to board interconnect may be laser-patterned.

Research Organization:
Lawrence Livermore National Laboratory (LLNL), Livermore, CA
DOE Contract Number:
W-7405-ENG-48
Assignee:
United States of America as represented by United States (Washington, DC)
Patent Number(s):
US 5241450
OSTI ID:
868907
Country of Publication:
United States
Language:
English

References (2)

Narrow Channel Forced Air Heat Sink journal March 1984
High-performance heat sinking for VLSI journal May 1981

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