Interprocessor bus switching system for simultaneous communication in plural bus parallel processing system

Patent · Mon Dec 31 23:00:00 EST 1990

OSTI ID:867678

Atac, Robert ^[1]; Fischler, Mark S ^[2]; Husby, Donald E ^[3]

---

1. Aurora, IL
2. Warrenville, IL
3. DeKalb, IL

A bus switching apparatus and method for multiple processor computer systems comprises a plurality of bus switches interconnected by branch buses. Each processor or other module of the system is connected to a spigot of a bus switch. Each bus switch also serves as part of a backplane of a modular crate hardware package. A processor initiates communication with another processor by identifying that other processor. The bus switch to which the initiating processor is connected identifies and secures, if possible, a path to that other processor, either directly or via one or more other bus switches which operate similarly. If a particular desired path through a given bus switch is not available to be used, an alternate path is considered, identified and secured.

• Research Organization: Fermi National Accelerator Laboratory (FNAL), Batavia, IL (United States)
• DOE Contract Number: AC02-76CH03000
• Assignee: Universities Research Association, Inc. (Washington, DC)
• Patent Number(s): US 4985830
• OSTI ID: 867678
• Country of Publication: United States
• Language: English

Related Subjects

/709/370/710/
alternate
apparatus
available
backplane
branch
bus
bus switch
bus switching
buses
communication
comprises
computer
computer systems
connected
considered
crate
desired
directly
hardware
identified
identifies
identifying
initiates
initiating
interconnected
interprocessor
method
modular
module
multiple
operate
package
parallel
parallel process
parallel processing
particular
path
plural
plurality
processing
processor
processor computer
secured
secures
serves
similarly
simultaneous
spigot
switch
switches
switching
systems
systems comprise
systems comprises
via