Interprocessor bus switching system for simultaneous communication in plural bus parallel processing system
A bus switching apparatus and method for multiple processor computer systems comprises a plurality of bus switches interconnected by branch buses. Each processor or other module of the system is connected to a spigot of a bus switch. Each bus switch also serves as part of a backplane of a modular crate hardware package. A processor initiates communication with another processor by identifying that other processor. The bus switch to which the initiating processor is connected identifies and secures, if possible, a path to that other processor, either directly or via one or more other bus switches which operate similarly. If a particular desired path through a given bus switch is not available to be used, an alternate path is considered, identified and secured. 11 figures.
- DOE Contract Number:
- AC02-76CH03000
- Assignee:
- Universities Research Association, Inc., Washington, DC (United States)
- Patent Number(s):
- A; US 4985830
- Application Number:
- PPN: US 7-249694
- OSTI ID:
- 7271695
- Country of Publication:
- United States
- Language:
- English
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