Micromachined VLSI 3D electronics. Final report for period September 1, 2000 - March 31, 2001
The phase I program investigated the construction of electronic interconnections through the thickness of a silicon wafer. The novel aspects of the technology are that the length-to-width ratio of the channels is as high as 100:1, so that the minimum amount of real estate is used for contact area. Constructing a large array of these through-wafer interconnections will enable two circuit die to be coupled on opposite sides of a silicon circuit board providing high speed connection between the two.
- Research Organization:
- NanoSciences Corporation, Oxford, CT (US)
- Sponsoring Organization:
- USDOE Office of Energy Research (ER) (US)
- DOE Contract Number:
- FG02-00ER83054
- OSTI ID:
- 808738
- Report Number(s):
- DOE/ER/83054-1; TRN: US200311%%59
- Resource Relation:
- Other Information: PBD: 31 Mar 2001; PBD: 31 Mar 2001
- Country of Publication:
- United States
- Language:
- English
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