CMOS realization of eight 32-tap transversal filters on a single IC
This dissertation presents design techniques for realizing eight 32-tap transversal filters on a single CMOS IC. The IC described contains 32 sample-and holds (S/H's), a 32 by 32 analog multiplexer, eight 32-input summing amplifiers and all of the needed control circuitry. The chip was fabricated using a standard 3-..mu..m, CMOS, p-wel process with double-polysilicon. Although a 3-..mu..m process was used to realize the circuitry, the layout was actually done using very conservative 5..mu..m minimum dimensions. This was done in order to increase yield and reduce short-channel effects. All of the necessary analog sampled-data and digital control circuits were realized on a 307 x 315 mil/sup 2/ die. The IC can be clocked at sampling frequencies as high as 2 MHz, while achieving a high dynamic range. Since each filter performs the equivalent signal processing of 32 multiplications and accumulations in each clock cycle, and since there are eight filters on the IC, the total amount of processing achieved is equivalent to a processing rate of 500 million multiplications and accumulations per second. This is over an order of magnitude faster than has ever been achieved be a single digital IC using state-of-the-art technology.
- Research Organization:
- California Univ., Los Angeles (USA)
- OSTI ID:
- 7255132
- Resource Relation:
- Other Information: Thesis (Ph. D.)
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE
INTEGRATED CIRCUITS
DIGITAL FILTERS
MOS TRANSISTORS
DESIGN
DIGITAL CIRCUITS
FABRICATION
SIGNAL CONDITIONING
ELECTRONIC CIRCUITS
MICROELECTRONIC CIRCUITS
SEMICONDUCTOR DEVICES
TRANSISTORS
420800* - Engineering- Electronic Circuits & Devices- (-1989)
990210 - Supercomputers- (1987-1989)