A CMOS time to digital converter IC with 2 level analog CAM
- Univ. of Pennsylvania, Philadelphia, PA (United States)
- Katholieke Univ. Leuven (Belgium)
A time to charge converter IC with an analog memory unit (TCCAMU) has been designed and fabricated in HP's CMOS 1.2-[mu]m n-well process. The TCCAMU is an event driven system designed for front end data acquisition in high energy physics experiments. The chip includes a time to charge converter, analog Level 1 and Level 2 associative memories for input pipelining and data filtering, and an A/D converter. The intervals measured and digitized range from 8--24 ns. Testing of the fabricated chip resulted in an LSB width of 107 ps, a typical differential nonlinearity of < 35 ps, and a typical integral nonlinearity of < 200 ps. The average power dissipation is 8.28 mW per channel. By counting the reference clock, a time resolution of 107 ps over [approximately] 1 s range could be realized.
- OSTI ID:
- 6928227
- Journal Information:
- IEEE Journal of Solid-State Circuits (Institute of Electrical and Electronics Engineers); (United States), Vol. 29:9; ISSN 0018-9200
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
DRIFT CHAMBERS
TIMING CIRCUITS
PARTICLE IDENTIFICATION
TIME-OF-FLIGHT METHOD
FABRICATION
PERFORMANCE TESTING
ANALOG-TO-DIGITAL CONVERTERS
DATA ACQUISITION SYSTEMS
HIGH ENERGY PHYSICS
INTEGRATED CIRCUITS
POWER LOSSES
PULSE CIRCUITS
READOUT SYSTEMS
TIME MEASUREMENT
ELECTRONIC CIRCUITS
ELECTRONIC EQUIPMENT
ENERGY LOSSES
EQUIPMENT
LOSSES
MEASURING INSTRUMENTS
MICROELECTRONIC CIRCUITS
MULTIWIRE PROPORTIONAL CHAMBERS
PHYSICS
PROPORTIONAL COUNTERS
RADIATION DETECTORS
TESTING
440104* - Radiation Instrumentation- High Energy Physics Instrumentation