A new bit-serial systolic multiplier over GF(2/sup m/)
Journal Article
·
· IEEE Trans. Comput.; (United States)
A new bit-serial systolic array is developed to compute multiplications over GF(2/sup m/). In contrast to another systolic multiplier, this new systolic algorithm allows the input elements to enter a linear systolic array in the same order and the system only requires one control signal.
- Research Organization:
- Computer Sciences Lab., Research School of Physical Sciences, Australian National Univ., Canberra 2601 (AU)
- OSTI ID:
- 7245087
- Journal Information:
- IEEE Trans. Comput.; (United States), Journal Name: IEEE Trans. Comput.; (United States) Vol. 37:6; ISSN ITCOB
- Country of Publication:
- United States
- Language:
- English
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