SIMD machine using cube connected cycles network architecture for vector processing

Patent · Tue Nov 04 00:00:00 EST 1986

OSTI ID:7162974

Wagner, R A; Poirier, C J

This patent describes a single instruction multiple data processor comprising: processing elements, interconnected in a Cube Connected Cycle Network design and using interprocessor communication links which carry one bit at a time in both directions simultaneously; controller means for controlling processor elements which feeds each of the processor elements identical local memory addresses, identical switching control bits, identical Boolean function selection codes, and distinct activation control bits, depending on each of the processor's position in the cube Connected Cycles Network in a prescribed fashion; and input/output devices connected to the network by switching devices wherein, each of the processing element comprises: two single-bit accumulator registors (A, B); two Boolean function generator units, each of which computes any one of 2/sup 8/ possible Boolean functions of three Boolean variables as specified by Boolean function codes sent 2 at a time by the controller to each of the processing elements; and switching circuit means controlled by the controller which select the three inputs to the logic function generators.

• Assignee: Duke Univ., Durham, NC
• Patent Number(s): US 4621339
• OSTI ID: 7162974
• Resource Relation: Patent File Date: Filed date 13 Jun 1983
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE
ARRAY PROCESSORS
COMPUTER ARCHITECTURE
VECTOR PROCESSING
CIRCUIT THEORY
COMPUTERIZED CONTROL SYSTEMS
DATA TRANSMISSION SYSTEMS
EQUIPMENT INTERFACES
INTEGRATED CIRCUITS
MEMORY DEVICES
SUPERCOMPUTERS
SWITCHING CIRCUITS
COMPUTERS
CONTROL SYSTEMS
DIGITAL COMPUTERS
ELECTRONIC CIRCUITS
MICROELECTRONIC CIRCUITS
PROGRAMMING
990200* - Mathematics & Computers