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Pumps architecture for pattern analysis and image database management

Journal Article · · IEEE Trans. Comput.; (United States)
The pumps architecture consists of p task processing units (TPU) which share a pool of special peripheral processors, VLSI functional units, and a common two-dimensional share memory (SM) via a block transfer oriented interconnection network. A shared cache is provided between the TPUS and SM for efficient MIMD interprocessor communication. The SM is also connected via a backend database management network (BDMN) with distributed control to the file memories, which are disk-based database storage devices. A front end communication processor (FECP) is used to switch the control of I/O terminals. The FECP and the BDMN manage the relationally structured image databases in addition to providing the efficient processing capabilities for classical file manipulative primitives. The FECP and BDMN have unique features such as a language interface for relational image database management using query-by-picture example (QPE) and spatial operators. Special VLSI functional units for pattern analysis and recognition of context-free languages and finite-state languages are presented. To effectively use the multiple resources on the system, they must be scheduled efficiently. A distributed scheduling algorithm is discussed with respect to the cube and omega networks. Lastly, the architecture of a database machine for image processing is discussed. Special hardware for selection and histogramming are presented. 41 references.
Research Organization:
Rice Univ., Houston, TX
OSTI ID:
5303495
Journal Information:
IEEE Trans. Comput.; (United States), Journal Name: IEEE Trans. Comput.; (United States) Vol. 10; ISSN ITCOB
Country of Publication:
United States
Language:
English