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Design and characterization of the BVX: An 8-channel CMOS preamplifier-shaper for silicon strips

Journal Article · · IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States)
DOI:https://doi.org/10.1109/23.281522· OSTI ID:7113709
; ;  [1]
  1. Oak Ridge National Lab., TN (United States); and others

This paper presents the design and characterization of an 8-channel preamplifier-shaper intended for use with silicon strip detectors ranging in capacitance from 1 to 20 pF. The nominal peaking time of the circuit is 200 ns with an adjustment range of [+-]50 ns. The circuit has a pitch (width) of 85[mu]m/channel with a power dissipation of 1.2 mW/channel and has been fabricated in 2 [mu]m p-wells CMOS. The 0 pF noise is 330 e with a noise slope of 64 e/pF. The design approach is presented as well as both test bench and strip detector measurements.

DOE Contract Number:
AC05-84OR21400
OSTI ID:
7113709
Journal Information:
IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States), Journal Name: IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States) Vol. 41:1 Pt2; ISSN 0018-9499; ISSN IETNAE
Country of Publication:
United States
Language:
English