The IBM RISC System/6000 processor; Hardware overview
- IBM Advanced Workstations Div., Austin, TX (US)
- International Business Machines Corp., Yorktown Heights, NY (USA). Thomas J. Watson Research Center
A highly concurrent superscalar second-generation family of RISC workstations and servers is described. The RISC System/6000 family is based on the new IBM POWER (performance optimization with enhanced RISC) architecture; the hardware implementation takes advantage of this powerful RISC architecture and employs sophisticated design techniques to achieve a short cycle time and a low cycles-per-instruction (CPI) ratio. The RS/6000 CPU features multiple-instruction dispatch, multiple functional units that operate concurrently, separate instruction and data caches, and zero-cycle branches. In this superscalar implementation, at a given cycle the equivalent of five operations can be executed simultaneously ( a branch, a condition-register operation, and a floating-point multiply-add).
- OSTI ID:
- 7035844
- Journal Information:
- IBM Journal of Research and Development (International Business Machines); (USA), Vol. 34:1; ISSN 0018-8646
- Country of Publication:
- United States
- Language:
- English
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