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Abstract specification of synchronous data types for VLSI and proving the correctness of systolic network implementations

Journal Article · · IEEE Trans. Comput.; (United States)
DOI:https://doi.org/10.1109/12.2209· OSTI ID:6984900

The authors present a combined methodology for specifying abstract synchronous data types and proving the correctness of systolic network implementations. 1) The authors show that an extension of the Parnas trace method of specifying software modules containing distinct access programs yields a natural method of specifying abstract synchronous data types which possess distinct access operators and are intended for implementation in VLSI. 2). They present associated systematic proof techniques and establish the correctness of several novel systolic network implementations of familiar data types. In so far as these specifications refer to the ongoing, externally visible behavior of (abstract) synchronous objects rather than the instantaneous internal configurations of (concrete, implementing) synchronous systems, the methodology appears to be naturally suited to systolic network implementations with their associated rippling of control flow and data flow. The important distinction between systolic control-flow networks and systolic data-flow networks is also presented.

Research Organization:
Dept. of Computer Science, Concordia Univ., Montreal, P.Q. (CA)
OSTI ID:
6984900
Journal Information:
IEEE Trans. Comput.; (United States), Journal Name: IEEE Trans. Comput.; (United States) Vol. 37:6; ISSN ITCOB
Country of Publication:
United States
Language:
English

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