Systolic algorithms and VLSI implementations for graph-matching problems
Thesis/Dissertation
·
OSTI ID:5954356
With the advances of current microcircuit technologies, VLSI implementations reveal characteristics distinct from earlier digital systems. To fully utilize the tremendous computation power of a silicon surface, VLSI algorithms need to be carefully and systematically derived. Systolic algorithms and event-driven networks are the keys to future VLSI performance. Based on these distinct requirements, fundamental mathematical tools such as linear algebra, relational algebra, group theory, random variables, and graph theory are applied toward the derivation and analysis of a representative problem, the graph-matching problem, and its implementation. Because of the systematic development based on mathematics, as opposed to human heuristics, the major computations of the derived algorithms are systematic matrix operations, and hence are easily mapped to asynchronous systolic implementations. An extended branch-and-bound formulation of the algorithm is also discussed. Finally, extensions to attributed graph matching and noisy graph matching are studied and a real world application is presented.
- Research Organization:
- Purdue Univ., Lafayette, IN (USA)
- OSTI ID:
- 5954356
- Country of Publication:
- United States
- Language:
- English
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