A two-dimensional advanced systolic array and its arithmetic architecture and design
The rapid advances in the very large scale integrated (VLSI) technology has created a flurry of research in designing future computer architectures. Many methods have been developed for parallel processing of algorithms by directly mapping them onto parallel architectures. We present new methodologies for design of systolic arrays and asynchronous arrays that implement recursive algorithms efficiently. Using the new methods, we develop a systolic array with very simple local interconnection for matrix multiplication which achieves optimal performance without using any undesirable properties such as preloading input data or global broadcasting. We prove the correctness of the matrix multiplication algorithms on the systolic array with space-time parameters. The implementations of the algorithms can be easily proved and can be systolically expanded. We also develop a multi-purpose built-in logic for asynchronous self-test (BLAST) modules in processing elements. An asynchronous array for matrix multiplication which can speed up the total computation time significantly is also presented. To demonstrate the power of the proposed systolic array, the array will be applied to the shortest path problem by using the partitioned mapping approach which will be the key to extend the computational capacity of VLSI architectures with fixed size. The utilization of partitioning algorithms can overcome difficulties in the management of a large-size graph. To achieve the highest possible computation speed of the systolic array, we develop a prefix carry-lookahead adder/subtractor which achieves the maximal possible parallelism. The new carry-lookahead design leads to a high-speed adders/subtractors with regular layout. The time complexity is 2log{sub 2}n - 1 while the Brent-Kung's scheme has 4log{sub 2}n.
- Research Organization:
- Maryland Univ., Baltimore, MD (USA)
- OSTI ID:
- 6596382
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
990200* -- Mathematics & Computers
990300 -- Information Handling
ALGORITHMS
ARRAY PROCESSORS
AUTOMATION
COMPUTER ARCHITECTURE
DESIGN
INFORMATION SYSTEMS
MATHEMATICAL LOGIC
OPTIMIZATION
RECURSION RELATIONS
SPACE DEPENDENCE
TIME DEPENDENCE
TWO-DIMENSIONAL CALCULATIONS