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A 12 bit analog to digital converter for VLSI applications in nuclear science

Conference · · IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States)
OSTI ID:6921624
; ;  [1]
  1. Lawrence Berkeley Lab., CA (United States)
This paper reports on a high density monolithic analog to digital converter (ADC) that has been designed and tested. The ADC features small silicon area and low power consumption for use in multichannel circuits for massively parallel particle physics detectors. The tested chip contains a linear ramp, precision high speed comparators, a pipelined counter, and double buffering storage latches fabricated in a 2 micron 2 polysilicon complementary metal-oxide-semiconductor (CMOS) technology. The prototype integrated circuit successfully combines digital frequencies in excess of 70 Mhz, with analog signals smaller than 1 mV. Test results show 1/4096 rms errors at conversion rates above 30 Khz, with less than 4 mW per channel power dissipation.
DOE Contract Number:
AC03-76SF00098
OSTI ID:
6921624
Report Number(s):
CONF-911106--
Conference Information:
Journal Name: IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States) Journal Volume: 39:4
Country of Publication:
United States
Language:
English