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TMC - A CMOS time to digital converter VLSI

Conference · · IEEE Trans. Nucl. Sci.; (United States)
OSTI ID:6081870
A new time to digital converter CMOS VLSI chip has been developed. Low-power and high-density characteristics have been attained by using a submicron CMOS process and a new circuit scheme utilizing variable delay elements with a feedback circuit. Test results of a prototype are described.
Research Organization:
KEK, National Lab. for High Energy Physics, 1-1 Oho, Tsukuba-shi, Ibaraki-ken 305 (JP); Dept. of Physics, Hiroshima Univ., Higashi-senda-machi, Naka-ku, Hiroshima-shi 730 (JP)
OSTI ID:
6081870
Report Number(s):
CONF-881103-
Conference Information:
Journal Name: IEEE Trans. Nucl. Sci.; (United States) Journal Volume: 36:1
Country of Publication:
United States
Language:
English

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