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The role of border traps in MOS high-temperature postirradiation annealing response

Conference · · IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States)
OSTI ID:6908033
; ; ; ;  [1]
  1. Sandia National Labs., Albuquerque, NM (United States)

The authors have performed a very-long-term study of the response of non-radiation-hardened MOS transistors to elevated-temperature, postirradiation biased anneals. The midgap-voltage shift of these devices returns to [approximately]0V during a 2.75-year, +6 V 100 C anneal, supporting the idea that interface traps and border traps (near-interfacial oxide traps which can exchange charge with the underlying Si) in these devices are charge-neutral at midgap. Subsequent switched-bias annealing reveals that a significant fraction of the radiation-induced trapped holes have not been removed from the device, but are compensated by electrons in border traps. These border traps can lead to large, reversible changes in midgap-voltage and subthreshold-stretchout reversibility remains significant in these devices even after annealing at temperatures up to 350 C. Similar reversibility in postirradiation response, though not as dramatic in magnitude, is observed for hardened transistors and capacitors. These results suggest that border traps may lead to increased reliability problems in some irradiated counterparts, especially in applications requiring high-temperature ([approximately]100 C or higher) operation.

OSTI ID:
6908033
Report Number(s):
CONF-930704--
Journal Information:
IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States), Journal Name: IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States) Vol. 40:6Pt1; ISSN 0018-9499; ISSN IETNAE
Country of Publication:
United States
Language:
English

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