Effects of oxide traps, interface traps, and border traps'' on metal-oxide-semiconductor devices
- Sandia National Laboratories, Department 1332, Albuquerque, New Mexico 87185-5800 (United States)
We have identified several features of the 1/[ital f] noise and radiation response of metal-oxide-semiconductor (MOS) devices that are difficult to explain with standard defect models. To address this issue, and in response to ambiguities in the literature, we have developed a revised nomenclature for defects in MOS devices that clearly distinguishes the language used to describe the physical location of defects from that used to describe their electrical response. In this nomenclature, oxide traps'' are simply defects in the SiO[sub 2] layer of the MOS structure, and interface traps'' are defects at the Si/SiO[sub 2] interface. Nothing is presumed about how either type of defect communicates with the underlying Si. Electrically, fixed states'' are defined as trap levels that do not communicate with the Si on the time scale of the measurements, but switching states'' can exchange charge with the Si. Fixed states presumably are oxide traps in most types of measurements, but switching states can either be interface traps or near-interfacial oxide traps that can communicate with the Si, i.e., border traps'' [D. M. Fleetwood, IEEE Trans. Nucl. Sci. [bold NS]-[bold 39], 269 (1992)]. The effective density of border traps depends on the time scale and bias conditions of the measurements. We show the revised nomenclature can provide focus to discussions of the buildup and annealing of radiation-induced charge in non-radiation-hardened MOS transistors, and to changes in the 1/[ital f] noise of MOS devices through irradiation and elevated-temperature annealing.
- DOE Contract Number:
- AC04-76DP00789
- OSTI ID:
- 6894549
- Journal Information:
- Journal of Applied Physics; (United States), Vol. 73:10; ISSN 0021-8979
- Country of Publication:
- United States
- Language:
- English
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