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Title: A subnanosecond clock Josephson 4-bit processor

Journal Article · · IEEE Journal of Solid-State Circuits (Institute of Electrical and Electronics Engineers); (USA)
DOI:https://doi.org/10.1109/4.50293· OSTI ID:6877211

The authors have constructed a Josephson 4-bit processor with a 4-bit slice microprocessor, a 4-bit multiplier, a 12-bit accumulator, an 8-kbit ROM, and a sequencer. The chip was fabricated with 1.5 {mu}m all-niobium technology, and contains 24000 Nb/AlO{sub {ital x}}/Nb Josephson junctions. The processor was designed using a bit slice structure and a simple ripple-carry method, and has a data sequence based on a three-stage pipeline. Experiments confirmed that the processor functions operated correctly. From the critical path measurements for each stage, the ROM has a 100-ps access time, the microprocessor can be clocked at 1.1 GHz, and the multiplier has a 200-ps multiplication time. The power dissipation of the chip was 6.1 mW.

OSTI ID:
6877211
Journal Information:
IEEE Journal of Solid-State Circuits (Institute of Electrical and Electronics Engineers); (USA), Vol. 25:1; ISSN 0018-9200
Country of Publication:
United States
Language:
English