Flexible high-speed FASTBUS master for data read-out and preprocessing

Conference · Sun Apr 01 04:00:00 EDT 1990 · IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (USA)

OSTI ID:6872448

Wurz, A; Manner, R ^[1]

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1. Heidelberg Univ. (Germany, F.R.). Physikalisches Inst.

This paper describes a single slot FASTBUS master module. It can be used for read-out and preprocessing of data that are read out from FASTBUS modules, e.g., and ADC system. The module consists of a 25 MHz, 32-bit processor MC 68030 with cache memory and memory management, a floating point coprocessor MC68882, 4 MBytes of main memory, and FASTBUS master and slave interfaces. In addition, a DMA controller for read-out of FASTBUS data is provided. The processor allows I/O via serial ports, a 16-bit parallel port, and a transputer link. Additional interfaces are planned. The main memory is multi-ported and can be accessed directly by the CPU, the FASTBUS, and external masters via the high-speed local bus that is accessible by way of a connector. The FASTBUS interface supports most of the standard operations in master and slave mode.

• OSTI ID: 6872448
• Report Number(s): CONF-900143--
• Conference Information: Journal Name: IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (USA) Journal Volume: 37
• Country of Publication: United States
• Language: English

Related Subjects

440100* -- Radiation Instrumentation
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY
99 GENERAL AND MISCELLANEOUS
990200 -- Mathematics & Computers
ANALOG-TO-DIGITAL CONVERTERS
COMPUTER ARCHITECTURE
DATA PROCESSING
ELECTRONIC EQUIPMENT
EQUIPMENT
FASTBUS SYSTEM
MEMORY DEVICES
NUCLEAR INSTRUMENT MODULES
PROCESSING