A novel implementation of pipelined Toeplitz system solver

Journal Article · Wed Oct 01 00:00:00 EDT 1986 · Proc. IEEE; (United States)

OSTI ID:6832273

Jou, I C; Hu, Y H; Feng, W S

This letter describes a novel implementation of the VLSI Toeplitz linear system solver using a lattice filter structure. By representing the triangular factorization with reflection coefficients, only O(N) storage elements are required. This compares favorably with the O(N/sup 2/) storage elements required in the previous implementation. With a linear array of O(N) processors the total computing time will be O(N) units with pipelined computations.

• Research Organization: Electrical Engineering Dept., National Taiwan Univ.
• OSTI ID: 6832273
• Journal Information: Proc. IEEE; (United States), Journal Name: Proc. IEEE; (United States) Vol. 74:10; ISSN IEEPA
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
990210* -- Supercomputers-- (1987-1989)
ARRAY PROCESSORS
CIRCUIT THEORY
COMPUTER ARCHITECTURE
COMPUTER CALCULATIONS
DATA-FLOW PROCESSING
DECISION MAKING
DIGITAL FILTERS
ELECTRONIC CIRCUITS
INTEGRATED CIRCUITS
MEMORY DEVICES
MICROELECTRONIC CIRCUITS
PERFORMANCE
PROGRAMMING
REFLECTION
TIME DEPENDENCE