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MOSFET performance degradation due to hot carriers

Thesis/Dissertation ·
OSTI ID:6831748
Hot-carrier-induced degradation of short-channel MOSFET's is investigated. It is shown that both charge trapping and interface-state generation take place. The relative importance of the two mechanisms depends on the bias condition and the electron-trap density in the oxide. For oxides fabricated with the state-of-art technology and for the worst-case bias condition, hot-electron trapping contributes less than 10% to the device degradation and interface-state generation is the dominant mechanism of DC stress-device degradation. Under pulsed stressing condition, however, hot-carrier trapping rate is increased due to the neutral oxide traps generated by the hot holes. While the substrate current is a useful tool for extrapolating lifetime of hot-carrier-induced MOSFET degradation from accelerated stressing data, the substrate current can vary significantly during a constant-voltage stress test. The device degradation was studied, using a constant-field method. The critical electron energy for device degradation is found to be 3 to 6 eV, depending on the oxide electric field. These values are 50% higher than those reported elsewhere. The effects of gate- and drain-voltage waveforms on the hot-carrier-induced MOSFET degradation are studied. Drain-voltage transients have little effect on the degradation rate. Only the falling edge of the gate pulse in the presence of a high-drain voltage enhances the degradation rate.
Research Organization:
California Univ., Berkeley (USA)
OSTI ID:
6831748
Country of Publication:
United States
Language:
English

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