Reconciliation of different gate-voltage dependencies of 1/f noise in n-MOS and p-MOS transistors
- Oberlin College, OH (United States). Dept. of Physics
- Sandia National Labs., Albuquerque, NM (United States)
The authors have examined the 1/f noise of 3 [mu]m [times] 16 [mu]m, n- and p-MOS transistors as a function of frequency (f), gate-voltage (V[sub g]), and temperature (T). Measurements were performed for 3 Hz [<=] f [<=] 50 kHz, 100 mV [<=] [vert bar]V[sub g] [minus] V[sub th] [vert bar][<=] 4 V, and 77 K [<=] T [<=] 300 K, where V[sub th] is the threshold voltage. Devices were operated in strong inversion in their linear regimes. At room temperature they find that, for n-MOS transistors, S[sub V[sub d]] [proportional to] V[sub d][sup 2]/(V[sub g] [minus] V[sub th])[sup 2], and for p-MOS transistors, the authors generally find that S[sub V[sub d]] [proportional to] V[sub d][sup 2]/(V[sub g] [minus] V[sub th]), consistent with trends reported by others. At lower temperatures, however, the results can be very different. In fact, they find that the temperature dependence of the noise and the gate-voltage dependence of the noise show similar features, consistent with the idea that the noise at a given T and V[sub g] is determined by the trap density, D[sub t](E), at trap energies E = E(T, V[sub g]). Both the T- and V[sub g]-dependencies of the noise imply that D[sub t](E) tends to be constant near the silicon conduction band edge, but increases as E approaches the valence band edge. It is evidently these differences in D[sub t](E) that lead to differences in the gate-voltage dependence of the noise commonly observed at room temperature for n- and p-MOS transistors.
- DOE Contract Number:
- AC04-94AL85000
- OSTI ID:
- 6796522
- Journal Information:
- IEEE Transactions on Electron Devices (Institute of Electrical and Electronics Engineers); (United States), Vol. 41:11; ISSN 0018-9383
- Country of Publication:
- United States
- Language:
- English
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