The evolution of RISC technology at IBM

Journal Article · Mon Jan 01 04:00:00 EST 1990 · IBM Journal of Research and Development (International Business Machines); (USA)

DOI:https://doi.org/10.1147/rd.341.0004· OSTI ID:6764510

Cocke, J ^[1]; Markstein, V ^[2]

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1. International Business Machines Corp., Yorktown Heights, NY (USA). Thomas J. Watson Research Center
2. IBM Univ. and College Systems, White Plains, NY (US)

This paper traces the evolution of IBM RISC architecture from its origins in the 1970s to the present = day IBM RISC System/6000 computer. The acronym RISC, for reduced instruction-set computer, is used in this paper to describe the 801 and subsequent architectures.However, RISC in this context does not strictly imply a reduced number of instructions, but rather a set of primitives carefully chosen to exploit the fastest component of the storage hierarchy and provide instructions that can be generated easily by compilers. The authors describe how these goals were embodied in the 801 architecture and how they have since evolved on the basis of experience and new technologies. The effect of this evolution is illustrated with the results of several benchmark tests of CPU performance.

• OSTI ID: 6764510
• Journal Information: IBM Journal of Research and Development (International Business Machines); (USA), Journal Name: IBM Journal of Research and Development (International Business Machines); (USA) Vol. 34:1; ISSN IBMJA; ISSN 0018-8646
• Country of Publication: United States
• Language: English

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