VLSI implementation of digital fourier transforms
Technical Report
·
OSTI ID:6730217
The construction of Fast Fourier Transform (FFT) processors is discussed. Pipeline and parallel-pipeline organizations are developed and are shown to meet the constraints imposed by VLSI. Various circuit technologies for the construction of these processors are compared, and the description of a set of NMOS chips are given. A technique for reducing the latency of the adders internal to the chips is also presented. Finally, a broad set of possible FFT organizations is discussed.
- Research Organization:
- California Univ., Berkeley (USA)
- OSTI ID:
- 6730217
- Report Number(s):
- AD-A-121898/1
- Country of Publication:
- United States
- Language:
- English
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