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Title: Silicon on insulator with active buried regions

Patent ·
OSTI ID:672617

A method is disclosed for forming patterned buried components, such as collectors, sources and drains, in silicon-on-insulator (SOI) devices. The method is carried out by epitaxially growing a suitable sequence of single or multiple etch stop layers ending with a thin silicon layer on a silicon substrate, masking the silicon such that the desired pattern is exposed, introducing dopant and activating in the thin silicon layer to form doped regions. Then, bonding the silicon layer to an insulator substrate, and removing the silicon substrate. The method additionally involves forming electrical contact regions in the thin silicon layer for the buried collectors. 10 figs.

Research Organization:
Univ. of California (United States)
Sponsoring Organization:
USDOE, Washington, DC (United States)
DOE Contract Number:
W-7405-ENG-48
Assignee:
Univ. of California, Oakland, CA (United States)
Patent Number(s):
US 5,760,443/A/
Application Number:
PAN: 8-547,080
OSTI ID:
672617
Resource Relation:
Other Information: PBD: 2 Jun 1998
Country of Publication:
United States
Language:
English