A fast integrating eight-bit bilinear ADC

Conference · Sat Oct 01 04:00:00 EDT 1988

OSTI ID:6710835

Biery, K A; Ouimette, D A; Ritchie, J L

A fast gated charge integrating ADC has been developed for measuring short photomultiplier pulses at very high event rates. The circuit is bilinar with 100 pC full scale and a least count of 150 fC. It features dc coupling, a minimum gate width of 20 ns, a minimum time between events of 200 ns plus gate width, a two event buffer, and front-end zero suppression with 100 ns read time per hit channel. Five hundred channels have been built and installed in the rare K/sub L//sup 0/ decay experiment E791 at Brookhaven National Laboratory. 3 refs., 6 figs., 1 tab.

• Research Organization: Stanford Linear Accelerator Center, Menlo Park, CA (USA)
• DOE Contract Number: AC03-76SF00515
• OSTI ID: 6710835
• Report Number(s): SLAC-PUB-4780; CONF-881103-20; ON: DE89003781
• Country of Publication: United States
• Language: English

Related Subjects

42 ENGINEERING
420800 -- Engineering-- Electronic Circuits & Devices-- (-1989)
440104* -- Radiation Instrumentation-- High Energy Physics Instrumentation
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY
ANALOG-TO-DIGITAL CONVERTERS
DESIGN
DETECTION
ELECTRONIC CIRCUITS
ELECTRONIC EQUIPMENT
EQUIPMENT
INTEGRATED CIRCUITS
MICROELECTRONIC CIRCUITS
PHOTOMULTIPLIERS
PHOTOTUBES
SPECIFICATIONS