A fast integrating eight-bit bilinear ADC

Conference · Wed Feb 01 04:00:00 EST 1989 · IEEE Trans. Nucl. Sci.; (United States)

OSTI ID:6331073

Biery, K A; Ouimetto, D A; Ritchie, J L

A fast gated charge integrating ADC has been developed for measuring short photomultiplier pulses at very high event rates. The circuit is bilinear with 100 pC full scale and a least count of 150 fC. It features dc coupling, a minimum gate width of 20 ns, a minimum time between events of 200 ns plus gate width, a two event buffer, and front-end zero suppression with 100 ns read time per hit channel. Five hundred channels have been built and installed in the rare K/sup 0//sub L/ decay experiment E791 at Brookhaven National Laboratory.

• Research Organization: Dept. of Physics, Stanford Univ., Stanford, CA (US)
• OSTI ID: 6331073
• Report Number(s): CONF-881103-
• Conference Information: Journal Name: IEEE Trans. Nucl. Sci.; (United States) Journal Volume: 36:1
• Country of Publication: United States
• Language: English

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