Address conversion unit for multiprocessor system
An address conversion unit is described for use in one processor in a multi-processor data processing system including a common memory, the processors and common memory being interconnected by a common bus including means for transferring address signals defining a common address space. The processor includes private bus means including means for transferring signals including address signals defining a private address space. A processor unit means is connected to the private bus means and includes means for transmitting and receiving signals including address signals over the private bus means for engaging in data transfers thereover. The address conversion unit is connected to the private bus means and common bus means for receiving address signals over the private bus means from the processor unit means in the private address space. The unit comprises: A. pointer storage means for storing a pointer identifying a portion of the common bus memory space; B. pointer generation means connected to receive a common bus address and for generating a pointer in response thereto for storage in the pointer storage means; and C. common bus address generation means connected to the private bus and the pointer storage means for receiving an address from the processor unit means and for generating a common bus address in response thereto. The common bus address is used to initiate transfers between the processor unit means and the common memory over the common bus.
- Assignee:
- Digital Equipment Corp., Maynard, MA
- Patent Number(s):
- US 4648035
- OSTI ID:
- 6700824
- Country of Publication:
- United States
- Language:
- English
Similar Records
Multi-processor using shared buses
High performance multi-processor system