Multi-processor using shared buses
This patent describes an apparatus for processing digital image data in accordance with digital image processing algorithms and delivering an enhanced digital image to an image printer, comprising: an array of separately addressable memory units for storing a digital image; an array of individually addressable processor which operates in accordance with stored algorithms to enhance a digital image, each including input and output data storage means, and address decoding means, each processor providing a request signal when it is ready to transfer digital image data to a particular memory unit; a first unidirectional data bus connected to the memory units and the processors for transferring digital image data from a selected one of the output data storage means of a particular processor to a selected one of the input data storage means of a particular memory unit; a second unidirectional data bus connected to the memory units; and means including a first arbitor circuit responsive to all the processor request signals for controlling the transfer of digital image data on the first bus and a second arbitor circuit independent of the first arbitor circuit and responsive to all the memory unit request signals for controlling the transfer of digital image data on the second bus.
- Assignee:
- Eastman Kodak Co., Rochester, NY
- Patent Number(s):
- US 4803617
- OSTI ID:
- 6384689
- Country of Publication:
- United States
- Language:
- English
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