Interprocessor traffic scheduling algorithm for multiple-processor networks

Journal Article · Wed Apr 01 04:00:00 EST 1987 · IEEE Trans. Comput.; (United States)

DOI:https://doi.org/10.1109/TC.1987.1676922· OSTI ID:6649895

Bianchini, Jr, R P; Shen, J P

Recent research on parallel systems has shown that the most difficult problem for system designers and users is interprocessor connection and communication. A methodology for the automated design and implementation of interprocessor communication for certain multiple-processor systems has been developed and is presented in this paper. For many application-specific and mission-oriented systems, the interprocessor communication is deterministic and can be specified at system inception. This specification can then be automatically mapped or complied onto a physical multiple-processor system using a network traffic scheduler. An algorithm for such a scheduler, which is capable of obtaining optimal network traffic patterns, has been developed. It is shown that the order of complexity of network scheduler components is polynomial, rather than exponential as in classical solutions.

• Research Organization: Dept. of Electrical and Computer Engineering, Carnegie-Mellon Univ., Pittsburgh, PA 15213
• OSTI ID: 6649895
• Journal Information: IEEE Trans. Comput.; (United States), Journal Name: IEEE Trans. Comput.; (United States) Vol. C-36:4; ISSN ITCOB
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
990210* -- Supercomputers-- (1987-1989)
ALGORITHMS
ARRAY PROCESSORS
COMMUNICATIONS
COMPUTER ARCHITECTURE
DATA PROCESSING
DATA TRANSMISSION
DESIGN
EQUIPMENT INTERFACES
FUNCTIONS
MAPPING
MATHEMATICAL LOGIC
PARALLEL PROCESSING
PERFORMANCE
POLYNOMIALS
PROCESSING
PROGRAMMING
RESEARCH PROGRAMS
TASK SCHEDULING