Logic Board Tester: General Purpose
- Bonneville Power Administration (BPA), Portland, OR (United States)
A device for testing logic boards is described in detail. As a logic board tester, this machine was designed to provide 120 independently programmable I/O channels, each having a 1024-bit data storage capacity. Its speed has been demonstrated at a solid 4.5 MHz, and a glitch as narrow as 23 nsec on any channel should cause the machine to halt with an error indication in that channel. Narrower glitches will halt the machine without an error indication. As a secondary function, this tester should be able to operate as a basic data-domain logic analyzer, having the same performance features. Triggering on any combination of bits or channels is provided with up to 999 words of post-trigger recording within a memory frame of up to 1024 words, of up to 120 bits each. Another possible function of the tester would be programmable word generation. Programming is uncomplicated, and programs may be modified on the fly during the board testing, a necessary feature in troubleshooting. Such modifications include addition or deletion of entire I/O channels and bit string generation of any predetermined length of 1's, 0's, or random patterns, in addition to single bit changes. It is possible semiautomatically to load square waves of varying periods, ranging from a change at every memory location, to a change after each 64 memory locations, each period being twice as long as the preceding one. Whole word transfers between any memory locations are very easy, enabling duplication or shifting of entire blocks of a program. A work search feature enables automatic location of any arrangement of bits of any length (up to 120). Various other convenience and fail-safe features are included. (RWR)
- Research Organization:
- Bonneville Power Administration (BPA), Portland, OR (United States)
- OSTI ID:
- 6609928
- Report Number(s):
- DOE/TIC--11398
- Country of Publication:
- United States
- Language:
- English
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